Mitsubishi Electric MELSEC iQ-R Series - Time Added to Instruction Processing Time

2030
APPX
Appendix 1 Instruction Processing Time
Time added to instruction processing time
When using the file register (R/ZR), module access device (U\G), or link direct device (J\), add extra time described
below to each instruction processing time.
Device name Data type Device part
specification
Additional time (s)
R04CPU,
R04ENCPU
R08CPU,
R08ENCPU,
R16CPU,
R16ENCPU,
R32CPU,
R32ENCPU,
R120CPU,
R120ENCPU
File register (R/ZR) When the extended
SRAM cassette is not
inserted
Bit Source 0.074 0.043
Destination 0.023 0.023
Word Source 0.074 0.043
Destination 0.023 0.023
Double word Source 0.148 0.085
Destination 0.044 0.044
When the extended
SRAM cassette is
inserted
Bit Source 0.099 0.099
Destination 0.028 0.028
Word Source 0.099 0.099
Destination 0.028 0.028
Double word Source 0.198 0.198
Destination 0.054 0.054
Module access device (U\G) Bit Source 13.000 13.000
Destination 14.000 14.000
Word Source 13.000 13.000
Destination 14.000 14.000
Double word Source 13.000 13.000
Destination 14.000 14.000
Link direct device (J\) Bit Source 51.000 51.000
Destination 52.000 52.000
Word Source 51.000 51.000
Destination 52.000 52.000
Double word Source 51.000 51.000
Destination 52.000 52.000