Mitsubishi Electric MELSEC iQ-R Series - Page 1525

15 NETWORK COMMON INSTRUCTIONS
15.1 Link Dedicated Instructions
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• The following figure shows the execution timing of the REQ instruction.
• When the J.REQ/G.REQ instruction is used for execution, one complete cycle of write processing is followed by another
while the write command is on. When the JP.REQ/GP.REQ instruction is executed, write processing is performed only once
on the rising edge when the write command turns on.
• When completed successfully
• When completed with an error
END0END0END0END0END0
END0 END0END0END0END0
OFF
OFF OFF
OFF
ON
ON
OFF
REQ
Sequence scan
Start contact
CPU module on
the own station
CPU module on
the target station
Network
module
Network
module
Completion device
(d2)
Completion status
indication device
(d2)+1
Sequence scan
1 scan
Channel n
Reading/writing clock data
END0END0END0END0END0
OFF
OFF
OFF
OFF
OFF
ON
ON
ON
OFF
REQ
1 scan
Error code
Sequence scan
Start contact
CPU module on
the own station
Network
module
Completion device
(d2)
Completion status
indication device
(d2)+1
Completion status
(s1)+1
Target station error
Channel n