7 APPLICATION INSTRUCTIONS
7.3 Program Execution Control Instructions
547
7
• When the DI (Disabling interrupt programs) instruction, DI (Disabling interrupt programs with specified priority or lower)
instruction, and EI instruction are executed, the interrupt disabled sections will be as follows.
• When another DI (Disabling interrupt programs with specified priority or lower) instruction with a wider priority range is executed during execution of the DI
(Disabling interrupt programs with specified priority or lower) instruction
A: Scan execution type program
(1) Interrupt enabled section for all priorities
(2) Interrupt disabled section for priority 3 to 8 (Interrupt enabled section for priority 1 and 2)
(3) Interrupt disabled section for priority 2 to 8 (Interrupt enabled section for priority 1)
• When another DI (Disabling interrupt programs with specified priority or lower) instruction with a narrower priority range is executed during execution of the DI
(Disabling interrupt programs with specified priority or lower) instruction
A: Scan execution type program
(1) Interrupt enabled section for all priorities
(2) Interrupt disabled section for priority 2 to 8 (Interrupt enabled section for priority 1)
(3) The priority of the disabled interrupt remains unchanged because the interrupt with priority 2 or lower is already disabled.
• When the DI (Disabling interrupt programs with specified priority or lower) instruction is executed in the interrupt program
A: Scan execution type program
B: Interrupt program
(1) Interrupt enabled section for all priorities
(2) Interrupt disabled section for priority 3 to 8 (Interrupt enabled section for priority 1 and 2)
(3) Interrupt disabled section for priority 2 to 8 (Interrupt enabled section for priority 1)
• When only the DI (Disabling interrupt programs) instruction is executed
A: Scan execution type program
(1) Interrupt enabled section for all priorities
(2) Interrupt disabled section for priority 1 to 8 (Interrupt disabled section for all priorities)
(3) Executing the EI instruction only once enables interrupts with all priorities.
(2)(1) (1)(2)(3)
EI DI K3 DI K2 EI EI
A
t
(2)(1) (1)
(3)
EI DI K2 DI K3 EI EI
A
t
EI DI K3 EI
(2)(1) (2)(3)
DI K2 EI IRET
(1)
A
t
B
(2)(1) (1)
(3)
EI DI DI DI EI
A
t