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Cisco ASR 1000 Series Software Configuration Guide

Cisco ASR 1000 Series
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PurposeCommand
T1.107, is distinguished from path and idle
signal messages in that it contains a generator
number as its final data element.
Verifying MDL
Use the show controllers serial command to display the MDL settings:
Router# show controllers serial 2/0/0
Serial2/0/0 -
Framing is c-bit, Clock Source is Line
Bandwidth limit is 44210, DSU mode 0, Cable length is 10
rx FEBE since last clear counter 2, since reset 0
Data in current interval (546 seconds elapsed):
0 Line Code Violations, 0 P-bit Coding Violation
0 C-bit Coding Violation
0 P-bit Err Secs, 0 P-bit Sev Err Secs
0 Sev Err Framing Secs, 0 Unavailable Secs
0 Line Errored Secs, 0 C-bit Errored Secs, 0 C-bit Sev Err Secs
Data in Interval 1:
0 Line Code Violations, 0 P-bit Coding Violation
0 C-bit Coding Violation
0 P-bit Err Secs, 0 P-bit Sev Err Secs
0 Sev Err Framing Secs, 0 Unavailable Secs
0 Line Errored Secs, 0 C-bit Errored Secs, 0 C-bit Sev Err Secs
Data in Interval 96:
0 Line Code Violations, 0 P-bit Coding Violation
0 C-bit Coding Violation
0 P-bit Err Secs, 0 P-bit Sev Err Secs
0 Sev Err Framing Secs, 0 Unavailable Secs
0 Line Errored Secs, 0 C-bit Errored Secs, 0 C-bit Sev Err Secs
Total Data (last 24 hours)
0 Line Code Violations, 0 P-bit Coding Violation,
0 C-bit Coding Violation,
0 P-bit Err Secs, 0 P-bit Sev Err Secs,
0 Sev Err Framing Secs, 0 Unavailable Secs,
0 Line Errored Secs, 0 C-bit Errored Secs, 0 C-bit Sev Err Secs
No alarms detected.
0 Sev Err Line Secs, 1 Far-End Err Secs, 0 Far-End Sev Err Secs
0 P-bit Unavailable Secs, 0 CP-bit Unavailable Secs
0 CP-bit Far-end Unavailable Secs
0 Near-end path failures, 0 Far-end path failures
No FEAC code is being received
MDL transmission is enabled
EIC: tst, LIC: 67,
Test Signal GEN_NO: test
Far-End MDL Information Received
EIC: tst, LIC: 67,
Test Signal GEN_NO: test
Configuring Scramble
T3/E3 scrambling is used to assist clock recovery on the receiving end. Scrambling is designed to randomize
the pattern of 1s and 0s carried in the physical layer frame. Randomizing the digital bits can prevent continuous,
nonvariable bit patternsin other words, long strings of all 1s or all 0s. Several physical layer protocols rely
on transitions between 1s and 0s to maintain clocking.
Scrambling can prevent some bit patterns from being mistakenly interpreted as alarms by switches placed
between the Data Service Units (DSUs).
Cisco ASR 1000 Series Aggregation Services Routers SIP and SPA Software Configuration Guide, Cisco IOS
XE Everest 16.5
264 OL-14127-17
Configuring the 2-Port and 4-Port T3/E3 Serial SPA
Optional Configurations

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Cisco ASR 1000 Series Specifications

General IconGeneral
SeriesASR 1000
CategoryNetwork Router
Operating SystemCisco IOS XE
MemoryUp to 64 GB
Interfaces10 Gigabit Ethernet
Power SupplyAC or DC options
DimensionsVaries by model
EncryptionIPsec, SSL
StorageVaries by model
Operating Temperature32°F to 104°F (0°C to 40°C)
Humidity5% to 95% non-condensing
MTBFVaries by model

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