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Hioki 8847 - 17.4 File Specifications

Hioki 8847
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16.2 External I/O
291
13
Chapter 16 External Control
16
External sampling is possible only when the Memory Function is enabled.
The sampling speed can be controlled by applying an external signal.
1. Connect the cables for the corresponding output signals to EXT.SMPL and GND
terminals.
2. Press the SYSTEM key to open the [Environment] sheet, and move the cursor
to [EXT SMPL].
3. Select whether the sampling event occurs on the rising edge () of the waveform
or the falling edge (
).
4. Input HIGH level (3.0 to 5.0 V) and LOW level (0 to 0.8 V) pulse waves or rectan-
gular waves to the EXT.SMPL terminal.
Data is sampled on the rising edge or falling edge of the input waveform. Note
that the sampling frequency is limited by the selected edge.
For proper operation, pulse width must be at least as shown in the following table.
16.2.3 External Sampling (EXT.SMPL)
Signal Input Procedure
Minimum external sampling pulse width
Setting
(EXT.SMPL)
Pulse width
When the Roll Mode is set to
[On]
When the Roll Mode is set to
[Off]
t
H
t
L
t t
H
t
L
t
> 5 μs> 5 μs> 10 μs > 50 ns > 50 ns > 100 ns
> 5 μs> 5 μs> 10 μs > 50 ns > 50 ns > 100 ns
Voltage range HIGH level: 3.0 to 5.0 V, LOW level: 0 to 0.8 V
Pulse width HIGH, LOW level: 50 ns or greater
Response
frequency
10 MHz or lower
Maximum input
voltage
-0.5 to 7 V
HIGH
3.0 to 5.0 V
EXT.SMPL
LOW
0 to 0.8 V
100 Ω
150 pF
5 V
GND
t
t
L
t
H
t
H
> 50 ns t
L
> 50 ns t
> 100 ns
3.3 kΩ
5 V
When a sampling signal of 5 MHz or greater is input, trigger points are
delayed by 1 sample.
When set to [Auto] or [On], the Roll Mode can be used with external sam-
pling. However, it is disabled if the external sampling input is faster than 100
kHz, to avoid degraded sampling accuracy.
When using the 8968 High Resolution Unit, it is disabled if the anti-aliasing fil-
ter (AAF) is enabled on the Channel screen - [Each Ch] sheet.
When Roll Mode is set to ON, externally sampled signals will not be accepted
for the following periods:
(1) 150 μs to 200 μs after the first sampling clock has been entered, and
(2) Clock 2 when no signals are detected in the period (1) above.

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