Mitsubishi Electric MELSEC iQ-R Series - Page 1227

11 PROCESS CONTROL INSTRUCTIONS
11.2 I/O Control Instructions
1225
11
■Loop tag past value memory
The system uses this area as a work area.
To start the control from the initial status, clear data by using a sequence program.
The loop tag past value memory occupies 32 words after the loop tag memory.
■Execution cycle (T)
Set the execution cycle (T) in SD816 and SD817 in single-precision real number.
Processing details
This instruction compares the input value (E1) with SV1/SV2 and outputs bit data when E1 reaches SV1/SV2.
The instruction also performs upper limit check, variation rate check, and output conversion processing of the input value (E1)
at that time.
■Upper limit check (1)
The upper limit check performs the following operations, and outputs the result to the upper limit alarm (BB2) and PHA of the
alarm detection (ALM).
*1 If PHI or ERRI of the disable alarm detection (INH) is set to 1, the upper limit alarm (BB2) and the PHA of the alarm detection (ALM) are
set to 0.
■Variation rate check processing (2)
A variation rate alarm check is performed during the variation rate alarm check time (CTIM) in the device specified by (d2).
For the variation rate alarm check, the variation of the input value (E1) is compared with the variation rate alarm value (DPL)
every execution cycle (T).
*1 If the DPPI or ERRI of the disable alarm detection (INH) is set to 1, the variation rate alarm (BB3) and the DPPA of the alarm detection
(ALM) are set to 0.
Operand: (d2)
Position Symbol Name Recommended range Data type Standard
value
Set by
+124  Variation rate
monitoring
counter
initialization
completion flag
System
+125 Variation rate
monitoring
counter
(rounded off to
the nearest
whole number)
+126
+127
X
n-m

Condition BB2, PHA
E1 > PH 1
*1
Others 0
Condition BB3, DPPA
(X
n
- X
n-m
)  DPL 1
*1
Others 0