7 APPLICATION INSTRUCTIONS
7.19 Check Code Instructions
905
7
■8-bit conversion mode (while SM772 is ON)
With regard to (n) data points starting from (s), the addition data and horizontal parity data of only low-order 8 bits are stored
to (d) and (d)+1 respectively.
When (n)=6
<Calculation of addition data value>
In 8-bit conversion mode, addition data is determined by adding 6 bytes in the following shaded portion. The addition data is
thus determined as "03B2H", and therefore "03B2H" is stored in the device specified by (d).
<Calculation of horizontal parity value>
In 8-bit conversion mode, the above shaded portion becomes the horizontal parity calculation target. The number of ON (1)
bits is calculated to determine the parity value which becomes ON (1) when the number of ON (1) bits is finally odd or OFF (0)
when it is finally even. The horizontal parity value is stored in the device specified by (d)+1.
In the following table, C2H is stored in the device specified by (d)+1.
There is no operation error.
Bit/horizontal parity value b7 b6 b5 b4 b3 b2 b1 b0 Value
Lower 8 bits of D0 0 1 1 0 0 1 0 0 64H
Lower 8 bits of D1 0 1 1 1 1 0 1 1 7BH
Lower 8 bits of D2 1 1 0 0 1 0 1 1 CBH
Lower 8 bits of D3 1 1 1 1 1 1 1 1 FFH
Lower 8 bits of D4 1 1 1 1 1 0 0 1 F9H
Lower 8 bits of D5 0 0 0 1 0 0 0 0 10H
Horizontal parity value 1 1 0 0 0 0 1 0 C2H
61H 64H64H
10H 7BH7BH
FAH CBHCBH
FFH FFHFFH
7FH F9HF9H
D0 24932
D1
4219
D2 -1333
D3 -1
D4 32761
27H 10H10H
64H
7BH
CBH
FFH
F9H
10HD5
10000
Upper Lower
Decimal Hexadecimal
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