Extended instructions
9.5 Interrupts
S7-1200 Programmable controller
System Manual, V4.2, 09/2016, A5E02486680-AK
421
Hardware interrupt events
The following hardware interrupt events are supported by the CPU:
● Rising edge events: first 12 built-in CPU digital inputs (DIa.0 to DIb.3) and all SB digital
inputs
– A rising edge occurs when the digital input transitions from OFF to ON as a response
to a change in the signal from a field device connected to the input.
● Falling edge events: first 12 built-in CPU digital inputs (DIa.0 to DIb.3) and all SB digital
inputs
– A falling edge occurs when the digital input transitions from ON to OFF.
● High-speed counter (HSC) current value = reference value (CV = RV) events (HSC 1
through 6)
– A CV = RV interrupt for a HSC is generated when the current count transitions from an
adjacent value to the value that exactly matches a reference value that was previously
established.
● HSC direction changed events (HSC 1 through 6)
– A direction changed event occurs when the HSC is detected to change from
increasing to decreasing, or from decreasing to increasing.
● HSC external reset events (HSC 1 through 6)
– Certain HSC modes allow the assignment of a digital input as an external reset that is
used to reset the HSC count value to zero. An external reset event occurs for such a
HSC, when this input transitions from OFF to ON.
Enabling hardware interrupt events in the device configuration
Hardware interrupts must be enabled during the device configuration. You must check the
enable-event box in the device configuration for a digital input channel or a HSC, if you want
to attach this event during configuration or run time.
Check box options within the PLC device configuration:
● Digital input
– Enable rising edge detection
– Enable falling edge detection
● High-speed counter (HSC)
– Enable this high-speed counter for use
– Generate interrupt for counter value equals reference value count
– Generate interrupt for external reset event
– Generate interrupt for direction change event
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