PLC concepts
5.1 Execution of the user program
S7-1200 Programmable controller
94 System Manual, V4.2, 09/2016, A5E02486680-AK
Cyclic interrupt OBs execute at a specified interval. You can configure up to a total of four
cyclic interrupt events, with one OB corresponding to each cyclic interrupt event.
The cyclic interrupt events allow you to configure the execution of an interrupt OB at a
configured cycle time. You configure the initial cycle time when you create the cyclic interrupt
OB. A cyclic event interrupts the program cycle and executes the corresponding cyclic
interrupt OB. Note that the cyclic interrupt event is at a higher priority class than the program
cycle event.
You can attach only one cyclic interrupt OB to a cyclic event.
You can assign a phase shift to each cyclic interrupt so that the execution of cyclic interrupts
can be offset from one another by the phase offset amount. For example, if you have a 5 ms
cyclic event and a 10 ms cyclic event, every ten milliseconds both events occur at the same
moment. If you phase shift the 5 ms event by 1 to 4 ms and the 10 ms event by 0 ms, then
the two events do not occur at the same moment.
The default phase offset is 0. To change the initial phase shift, or to change the cyclic time
for a cyclic event, follow these steps:
1. Right-click the cyclic interrupt OB in the project tree.
2. Select "Properties" from the context menu.
3. Click "Cyclic interrupt" from the "Cyclic interrupt [OB 30]" dialog, and enter the new initial
values.
The maximum phase offset is 6000 ms (6 seconds) or the maximum Cyclic time, whichever
is smaller.
You can also query and change the scan time and the phase shift from your program using
the Query cyclic interrupt (QRY_CINT) and Set cyclic interrupt (SET_CINT) instructions.
Scan time and phase shift values set by the SET_CINT instruction do not persist through a
power cycle or a transition to STOP mode; scan time and phase shift values return to the
initial values following a power cycle or a transition to STOP. The CPU supports a total of
four cyclic interrupt events.
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