RM0440 Rev 4 1415/2126
RM0440 General-purpose timers (TIM15/TIM16/TIM17)
1445
Bit 9 BKINP: TIMx_BKIN input polarity
This bit selects the TIMx_BKIN alternate function input sensitivity. It must be programmed
together with the BKP polarity bit.
0: TIMx_BKIN input is active high
1: TIMx_BKIN input is active low
Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits
in TIM15_BDTR register).
Bit 8 BKCMP8E: tim_brk_cmp8 enable
This bit enables the tim_brk_cmp8 for the timer’s tim_brk input. mdf_brkx output is ‘ORed’
with the other tim_brk sources.
0: tim_brk_cmp8 input disabled
1: tim_brk_cmp8 input enabled
Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits
in TIM15_BDTR register).
Bit 7 BKCMP7E: tim_brk_cmp7 enable
This bit enables the tim_brk_cmp7 for the timer’s tim_brk input. COMP7 output is ‘ORed’
with the other tim_brk sources.
0: tim_brk_cmp7 input disabled
1: tim_brk_cmp7 input enabled
Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits
in TIM15_BDTR register).
Bit 6 BKCMP6E: tim_brk_cmp6 enable
This bit enables the tim_brk_cmp6 for the timer’s tim_brk input. tim_brk_cmp6 output is
‘ORed’ with the other tim_brk sources.
0: tim_brk_cmp6 input disabled
1: tim_brk_cmp6 input enabled
Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits
in TIM15_BDTR register).
Bit 5 BKCMP5E: tim_brk_cmp5 enable
This bit enables the tim_brk_cmp5 for the timer’s tim_brk input. tim_brk_cmp5 output is
‘ORed’ with the other tim_brk sources.
0: tim_brk_cmp5 input disabled
1: tim_brk_cmp5 input enabled
Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits
in TIM15_BDTR register).
Bit 4 BKCMP4E: tim_brk_cmp4 enable
This bit enables the tim_brk_cmp4 for the timer’s tim_brk input. tim_brk_cmp4 output is
‘ORed’ with the other tim_brk sources.
0: tim_brk_cmp4 input disabled
1: tim_brk_cmp4 input enabled
Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits
in TIM15_BDTR register).
Bit 3 BKCMP3E: tim_brk_cmp3 enable
This bit enables the tim_brk_cmp3 for the timer’s tim_brk input. tim_brk_cmp3 output is
‘ORed’ with the other tim_brk sources.
0: tim_brk_cmp3 input disabled
1: tim_brk_cmp3 input enabled
Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits
in TIM15_BDTR register).
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