EasyManuals Logo
Home>ST>Microcontrollers>STM32G473

ST STM32G473 User Manual

ST STM32G473
2126 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #229 background imageLoading...
Page #229 background image
RM0440 Rev 4 229/2126
RM0440 Power control (PWR)
271
6 Power control (PWR)
6.1 Power supplies
The STM32G4 Series devices require a 1.71 V to 3.6 V operating supply voltage (V
DD
).
Analog peripherals are supplied through independent power domain V
DDA
.
V
DD
= 1.71 V to 3.6 V
V
DD
is the external power supply for the I/Os, the internal regulator and the system
analog such as reset, power management and internal clocks. It is provided externally
through VDD pins.
V
DDA
= 1.62 V (ADC/ COMP) / 1.71 V (DAC 1MSPS / DAC 15MSPS) / 2 V (OPAMP) /
2.4 V (VREFBUF)
V
DDA
is the external analog power supply for A/D converters, D/A converters, voltage
reference buffer, operational amplifiers and comparators. The V
DDA
voltage level is
independent from the V
DD
voltage. V
DDA
should be preferably connected to V
DD
when
these peripherals are not used.
During power up and power down, the following power sequence is required:
When V
DD
is below 1 V, then V
DDA
supply must remain below V
DD
+ 300 mV
When V
DD
is above 1 V, all power supplies became independent.
During power down phase, V
DD
can temporarily become lower then other supplies only
if the energy provided to the MCU remains below 1 mJ. this allows external decoupling
capacitors to be discarged with different time constants during the power down
transient phase.
V
BAT
= 1.55 V to 3.6 V
V
BAT
is the power supply for RTC, external clock 32 kHz oscillator and backup registers
(through power switch) when V
DD
is not present. VBAT is internally bonded to VDD for
small packages without dedicated pin.
V
REF-, VREF+
V
REF+
is the input reference voltage for ADCs and DACs. It is also the output of the
internal voltage reference buffer when enabled.
When V
DDA
< 2 V, V
REF+
must be equal to V
DDA
.
When V
DDA
≥ 2 V, V
REF+
must be between 2 V and V
DDA
.
V
REF+
can be grounded when ADC and DAC are not active.
The internal voltage reference buffer supports three output voltages, which are
configured with VRS bit in the VREFBUF_CSR register:
–V
REF+
around 2.048 V. This requires V
DDA
equal to or higher than 2.4 V.
–V
REF+
around 2.5 V. This requires V
DDA
equal to or higher than 2.8 V.
–V
REF+
around 2.9 V. This requires V
DDA
equal to or higher than 3.135 V.
V
REF+
pin is not available on all packages. When not available on the package, it is
bonded to V
DDA
. When the V
REF+
is double-bonded with V
DDA
in a package, the
internal voltage reference buffer (VREFBUF) is not available and must be kept disable
(refer to related device datasheet for packages pinout description).
V
REF-
is internally double bonded with V
SSA
.

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the ST STM32G473 and is the answer not in the manual?

ST STM32G473 Specifications

General IconGeneral
BrandST
ModelSTM32G473
CategoryMicrocontrollers
LanguageEnglish

Related product manuals