ST STM32G473 User Manual

RM0440 Rev 4 749/2126
RM0440 Digital-to-analog converter (DAC)
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transferred into DAC_DOR1 (three dac_hclk clock cycles later). The DAC channel1 triangle
counter is then updated.
When a DAC channel2 trigger arrives, the DAC channel2 triangle counter, with a triangle
amplitude configured by MAMP2[3:0], is added to the DHR2 register and the sum is
transferred into DAC_DOR2 (three dac_hclk clock cycles later). The DAC channel2 triangle
counter is then updated.
Independent trigger with single sawtooth generation
To configure the DAC in this conversion mode, the following sequence is required:
1. Configure different trigger sources by setting different values in STRSTTRIGSEL1[3:0],
STRSTTRIGSEL2[3:0], STINCTRIGSEL2[3:0] and STINCTRIGSEL1[3:0] bits.
2. Configure the two DAC channel WAVEx[1:0] bits to 11 and set the same
STRSTDATAx[11:0], STINCDATAx[15:0] and STDIRx values for each register.
When a DAC channel1 trigger arrives, the DAC channel1 sawtooth counter updates the
DHR1 register and transfers it into DAC_DOR1 (three AHB clock cycles later).
When a DAC channel2 trigger arrives, the DAC channel2 sawtooth counter updates the
DHR1 register and transfers it into DAC_DOR1 (three AHB clock cycles later).
Independent trigger with different sawtooth wave generation
To configure the DAC in this conversion mode, the following sequence is required:
1. Configure different trigger sources by setting different values in the
STRSTTRIGSEL1[23:0], STRSTTRIGSEL2[23:0], STINCTRIGSEL2[3:0] and
STINCTRIGSEL1[3:0] bits.
2. Configure the two DAC channel WAVEx[1:0] bits as 11 and set different
STRSTDATAx[11:0], STINCDATAx[15:0] and STDIRx value for each register.
When a DAC channel1 trigger arrives, the DAC channel1 sawtooth counter updates the
DHR1 register and loads it into DAC_DOR1 (three AHB clock cycles later).
When a DAC channel2 trigger arrives, the DAC channel2 sawtooth counter updates the
DHR2 register and loads it into DAC_DOR1 (three AHB clock cycles later).
Simultaneous software start
To configure the DAC in this conversion mode, the following sequence is required:
• Load the dual DAC channel data to the desired DHR register (DAC_DHR12RD,
DAC_DHR12LD or DAC_DHR8RD).
In this configuration, one dac_hclk clock cycle later, the DHR1 and DHR2 registers are
transferred into DAC_DOR1 and DAC_DOR2, respectively.
Simultaneous trigger without wave generation
To configure the DAC in this conversion mode, the following sequence is required:
1. Set the two DAC channel trigger enable bits TEN1 and TEN2.
2. Configure the same trigger source for both DAC channels by setting the same value in
the TSEL1 and TSEL2 bitfields.
3. Load the dual DAC channel data to the desired DHR register (DAC_DHR12RD,
DAC_DHR12LD or DAC_DHR8RD).

ST STM32G473 Specifications

General

Brand	ST
Model	STM32G473
Category	Microcontrollers
Language	English