Operational amplifiers (OPAMP) RM0440
786/2126 RM0440 Rev 4
25 Operational amplifiers (OPAMP)
25.1 Introduction
The devices embed six operational amplifiers with two inputs and one output each. The
three I/Os can be connected to the external pins, thus enabling any type of external
interconnections. The operational amplifiers can be configured internally as a follower, as an
amplifier with a non-inverting gain ranging from 2 to 64 or with inverting gain ranging from -1
to -63.
The positive input can be connected to the internal DAC.
The output can be connected to the internal ADC.
25.2 OPAMP main features
• Rail-to-rail input and output voltage range
• Low input bias current
• Low input offset voltage
• high frequency gain bandwidth
• High-speed mode to achieve a better slew rate
Note: Refer to the product datasheet for detailed OPAMP characteristics.
25.3 OPAMP functional description
The OPAMP has several modes.
Each OPAMP can be individually enabled, when disabled the output is high-impedance.
When enabled, it can be in calibration mode, all input and output of the OPAMP are then
disconnected, or in functional mode.
In functional mode the inputs and output of the OPAMP are connected as described in
Section 25.3.4: Signal routing.
25.3.1 OPAMP output redirection to internal ADC channels
Operational amplifier output can be redirected internally to an ADC channel by setting
OPAINTOEN bit in OPAMPx_CSR register. In this case, the GPIO on which is mapped
given OPAMPx_VOUT output is free and can be used for another purpose. ADC can
measure OPAMPx_VOUT voltage internally. See Figure 200: Operational amplifier possible
connection for assignment between OPAMPx internal outputs and ADC channels.
25.3.2 OPAMP reset and clocks
The OPAMP clock provided by the clock controller is synchronized with the PCLK2 (APB2
clock). There is no clock enable control bit provided in the RCC controller. To use a clock
source for the OPAMP, the SYSCFG clock enable control bit must be set in the RCC
controller.
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