1402
12 MULTIPLE CPU DEDICATED INSTRUCTIONS
12.1 Another CPU Module Access Instructions
Readable/writable devices
The following table lists the devices that can be read from or written to another CPU module by using another CPU module
access instructions.
*1 When an indirect specification is used for the target device, the device to be written or read is determined from the indirect address
stored in the device of the host CPU module.
*2 Index modification (Z, ZZ representation) using the index register by the string specification can be performed. Another CPU module is
accessed with a value which is index-modified by the value of the index register of the host CPU module.
For example, "K4M0Z0" with Z0=16 causes M0+16=M16, causing K4M16 to access another CPU module.
Similarly, "ZR0ZZ0" with Z0, Z1=100000 causes ZR0+10000=ZR100000, causing ZR100000 to access another CPU module.
Device specification method and readable/writable ranges
Specify the device of another CPU module with character strings.
Directly specify "D200", the write-target device number in another CPU module.
The string specification enables writing to or reading from every range of the device in another CPU module. For example,
when the data register of the host CPU has 12K points while the data register of another CPU module has 16K points, 16K
points of data can be written to or read from the head of the data register of another CPU module.
• Even if "0" is added to higher places of a device number, the device is processed the same as when it is not
added. For example, "D1" and "D0001" are each processed as D1.
• Device numbers are not case-sensitive in terms of processing. For example, "D1" and "d1" are each
processed as D1.
• Note that if a device not existing in another CPU module is specified by a character string, the instruction
will be completed with an error.
Classification Type Device name
*2
Target device
setting
Condition
User device
System device
Bit device X, Y, M, L, B, F, SB,
SM
Available Satisfy the following conditions.
• Four digits are specified by 16 bits.
• The start bit device is a multiple of 16 (10H).
Word device T, ST, C, D, W, SW,
SD
Available None
File register Word device R, ZR Available None
Indirect specification
*1
Not available None
X0
MP.DDWR
H3E1 D0 M0D100 "D200"
·
·
D0
D12287
D0
D16383
Host CPU module Another CPU module
Data in this area can
be read and written.
Data register
(16K points)
Data register
(12K points)
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