ST STM32G473 User Manual

RM0440 Rev 4 1535/2126
RM0440 AES hardware accelerator (AES)
1538
34.7.12 AES initialization vector register 3 (AES_IVR3)
Address offset: 0x2C
Reset value: 0x0000 0000
34.7.13 AES key register 4 (AES_KEYR4)
Address offset: 0x30
Reset value: 0x0000 0000
34.7.14 AES key register 5 (AES_KEYR5)
Address offset: 0x34
Reset value: 0x0000 0000
Bits 31:0 IVI[95:64]: Initialization vector input, bits [95:64]
Refer to the AES_IVR0 register for description of the IVI[128:0] bitfield.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
IVI[127:112]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
1514131211109876543210
IVI[111:96]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:0 IVI[127:96]: Initialization vector input, bits [127:96]
Refer to the AES_IVR0 register for description of the IVI[128:0] bitfield.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
KEY[159:144]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
1514131211109876543210
KEY[143:128]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:0 KEY[159:128]: Cryptographic key, bits [159:128]
Refer to the AES_KEYR0 register for description of the KEY[255:0] bitfield.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
KEY[191:176]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
1514131211109876543210
KEY[175:160]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:0 KEY[191:160]: Cryptographic key, bits [191:160]
Refer to the AES_KEYR0 register for description of the KEY[255:0] bitfield.

ST STM32G473 Specifications

General

Brand	ST
Model	STM32G473
Category	Microcontrollers
Language	English