To Next Page

To Previous Page

RM0440 Rev 4 251/2126

RM0440 Power control (PWR)

271

I/O states in Standby mode

In the Standby mode, the I/Os can be configured either with a pull-up (refer to PWR_PUCRx

registers (x=A,B,C,D,E,F,G)), or with a pull-down (refer to PWR_PDCRx registers

(x=A,B,C,D,E,F,G)), or can be kept in analog state.

The RTC outputs on PC13 are functional in Standby mode. PC14 and PC15 used for LSE

are also functional. 5 wakeup pins (WKUPx, x=1,2...5) and the 3 RTC tampers are available.

Entering Standby mode

The Standby mode is entered according Section : Entering low power mode, when the

SLEEPDEEP bit in the Cortex

-M4 with FPU System Control register is set.

Refer to Table 47: Standby mode for details on how to enter Standby mode.

In Standby mode, the following features can be selected by programming individual control

bits:

• Independent watchdog (IWDG): the IWDG is started by writing to its Key register or by

hardware option. Once started it cannot be stopped except by a reset. See

Section 42.3: IWDG functional description in Section 42: Independent watchdog

(IWDG).

• real-time clock (RTC): this is configured by the RTCEN bit in the Backup domain

control register (RCC_BDCR)

• Internal RC oscillator (LSI): this is configured by the LSION bit in the Control/status

• External 32.768 kHz oscillator (LSE): this is configured by the LSEON bit in the Backup

domain control register (RCC_BDCR)

Exiting Standby mode

The Standby mode is exit according Section : Entering low power mode. The SBF status

flag in the Power control register 3 (PWR_CR3) indicates that the MCU was in Standby

mode. All registers are reset after wakeup from Standby except for Power control register 3

(PWR_CR3).

Refer to Table 47: Standby mode for more details on how to exit Standby mode.

ST STM32G473 User Manual

Questions and Answers: