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ST STM32G473 User Manual

ST STM32G473
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RM0440 Rev 4 29/2126
RM0440 Contents
48
29.4.9 Forced output mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1256
29.4.10 Output compare mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1256
29.4.11 PWM mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1258
29.4.12 Asymmetric PWM mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1266
29.4.13 Combined PWM mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1267
29.4.14 Clearing the tim_ocxref signal on an external event . . . . . . . . . . . . . 1268
29.4.15 One-pulse mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1270
29.4.16 Retriggerable one pulse mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1271
29.4.17 Pulse on compare mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1272
29.4.18 Encoder interface mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1274
29.4.19 Direction bit output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1292
29.4.20 UIF bit remapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1293
29.4.21 Timer input XOR function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1293
29.4.22 Timers and external trigger synchronization . . . . . . . . . . . . . . . . . . . 1293
29.4.23 Timer synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1297
29.4.24 DMA burst mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1302
29.4.25 TIM2/TIM3/TIM4/TIM5 DMA requests . . . . . . . . . . . . . . . . . . . . . . . . 1303
29.4.26 Debug mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1304
29.4.27 TIM2/TIM3/TIM4/TIM5 low-power modes . . . . . . . . . . . . . . . . . . . . . 1304
29.4.28 TIM2/TIM3/TIM4/TIM5 interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1304
29.5 TIM2/TIM3/TIM4/TIM5 registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1306
29.5.1 TIMx control register 1 (TIMx_CR1)(x = 2 to 5) . . . . . . . . . . . . . . . . . 1306
29.5.2 TIMx control register 2 (TIMx_CR2)(x = 2 to 5) . . . . . . . . . . . . . . . . . 1307
29.5.3 TIMx slave mode control register (TIMx_SMCR)(x = 2 to 5) . . . . . . . 1309
29.5.4 TIMx DMA/Interrupt enable register (TIMx_DIER)(x = 2 to 5) . . . . . . 1313
29.5.5 TIMx status register (TIMx_SR)(x = 2 to 5) . . . . . . . . . . . . . . . . . . . . 1314
29.5.6 TIMx event generation register (TIMx_EGR)(x = 2 to 5) . . . . . . . . . . 1316
29.5.7 TIMx capture/compare mode register 1 [alternate]
(TIMx_CCMR1)(x = 2 to 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1317
29.5.8 TIMx capture/compare mode register 1 [alternate]
(TIMx_CCMR1)(x = 2 to 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1319
29.5.9 TIMx capture/compare mode register 2 [alternate]
(TIMx_CCMR2)(x = 2 to 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1321
29.5.10 TIMx capture/compare mode register 2 [alternate]
(TIMx_CCMR2)(x = 2 to 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1322
29.5.11 TIMx capture/compare enable register (TIMx_CCER)(x = 2 to 5) . . . 1323
29.5.12 TIMx counter (TIMx_CNT)(x = 3, 4) . . . . . . . . . . . . . . . . . . . . . . . . . . 1325
29.5.13 TIMx counter (TIMx_CNT)(x = 2, 5) . . . . . . . . . . . . . . . . . . . . . . . . . . 1325

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ST STM32G473 Specifications

General IconGeneral
BrandST
ModelSTM32G473
CategoryMicrocontrollers
LanguageEnglish

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