High-resolution timer (HRTIM) RM0440
988/2126 RM0440 Rev 4
27.5.22 HRTIM timer x compare 3 register (HRTIM_CMP3xR) (x = A to F)
Address offset: Block A: 0x0A8
Address offset: Block B: 0x128
Address offset: Block C: 0x1A8
Address offset: Block D: 0x228
Address offset: Block E: 0x2A8
Address offset: Block F: 0x328
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
CMP3x[15:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 CMP3x[15:0]: Timer x compare 3 value
This register holds the compare 3 value.
This register holds either the content of the preload register or the content of the active register if
preload is disabled.
The compare value must be either null or above or equal to 3 periods of the fHRTIM clock, that is
0x60 if CKPSC[2:0] = 0, 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
The null value is programmed following the use case described in Section : Null duty cycle exception
case.
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