RM0440 Rev 4 987/2126
RM0440 High-resolution timer (HRTIM)
1083
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 CMP2x[15:0]: Timer x compare 2 value
This register holds the compare 2 value.
This register holds either the content of the preload register or the content of the active register if
preload is disabled.
The compare value must be above or equal to 3 periods of the f
HRTIM
clock, that is 0x60 if
CKPSC[2:0] = 0, 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
This register behaves as an auto-delayed compare register, if enabled with DELCMP2[1:0] bits in
HRTIM_TIMxCR.