Interactive SourceMeter® Instrument Reference Manual Appendix C:
2450-901-01 Rev. B/September 2013 C-11
Status Byte Register diagram
The Status Byte Register consists of two 8-bit registers that control service requests, the Status Byte
Register and the Service Request Enable Register. These registers are shown in the following figure.
Figure 152: Model 2450 Status Byte Register
The bits in the Status Byte Register are described in the following table.
Bit
Decimal
value
Bit name When set, indicates the following
has occurred:
Measurement summary Bit (MSB)
An enabled questionable event
An error is present in the error queue
(warning and information messages do
not affect this bit)
Questionable summary bit (QSB)
An enabled questionable event
A response message is present in the
output queue
An enabled standard event
Request for service (RQS)/Master summary
status (MSS)
An enabled summary bit of the Status
Byte Register is set; depending on
how it is used, this is either the
Request for Service (RQS) bit or the
Master Summary Status (MSS) bit
Operation summary bit (OSB)
An enabled operation event