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Renesas RL78/G10 - Page 14

Renesas RL78/G10
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Index-9
13.5.8 Interrupt request (INTIICA0) generation timing and wait control ................................................... 437
13.5.9 Address match detection method ................................................................................................. 438
13.5.10 Error detection ............................................................................................................................ 438
13.5.11 Extension code ........................................................................................................................... 438
13.5.12 Arbitration ................................................................................................................................... 439
13.5.13 Wakeup function ......................................................................................................................... 441
13.5.14 Communication reservation ........................................................................................................ 444
13.5.15 Cautions ..................................................................................................................................... 448
13.5.16 Communication operations ......................................................................................................... 449
13.5.17 Timing of I
2
C interrupt request (INTIICA0) occurrence ............................................................... 459
13.6 Timing Charts ........................................................................................................................... 480
CHAPTER 14 INTERRUPT FUNCTIONS............................................................................................. 495
14.1 Interrupt Function Types ......................................................................................................... 495
14.2 Interrupt Sources and Configuration ..................................................................................... 495
14.3 Registers Controlling Interrupt Functions ............................................................................. 500
14.3.1 Interrupt request flag registers (IF0L, IF0H, IF1L) ........................................................................ 502
14.3.2 Interrupt mask flag registers (MK0L, MK0H, MK1L) ..................................................................... 504
14.3.3 Priority specification flag registers (PR00L, PR00H, PR10L, PR10H, PR01L, PR11L) ................ 505
14.3.4 External interrupt rising edge enable register 0 (EGP0),
external interrupt falling edge enable register 0 (EGN0) .............................................................. 507
14.3.5 Program status word (PSW) ......................................................................................................... 508
14.4 Interrupt Servicing Operations ............................................................................................... 509
14.4.1 Maskable interrupt request acknowledgment ............................................................................... 509
14.4.2 Software interrupt request acknowledgment ................................................................................ 511
14.4.3 Multiple interrupt servicing ............................................................................................................ 511
14.4.4 Interrupt request hold ................................................................................................................... 515
CHAPTER 15 KEY INTERRUPT FUNCTION ..................................................................................... 516
15.1 Functions of Key Interrupt ...................................................................................................... 516
15.2 Configuration of Key Interrupt ................................................................................................ 516
15.3 Register Controlling Key Interrupt ......................................................................................... 518
15.3.1 Key interrupt control register (KRCTL) ......................................................................................... 518
15.3.2 Key return mode register (KRM0) ................................................................................................. 519
15.3.3 Key return flag register (KRF) ....................................................................................................... 520
15.3.4 Registers controlling port functions of key interrupt input pins...................................................... 520
15.4 Key Interrupt Operation ........................................................................................................... 521
15.4.1 When not using the key interrupt flag (KRMD = 0) ....................................................................... 521
15.4.2 When using the key interrupt flag (KRMD = 1) ............................................................................. 522
CHAPTER 16 STANDBY FUNCTION .................................................................................................. 524

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