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Renesas RL78/G10 - Block Diagram; 10-Pin Products

Renesas RL78/G10
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RL78/G10 CHAPTER 1 OUTLINE
R01UH0384EJ0311 6
Dec 22, 2016
1.5 Block Diagram
1.5.1 10-pin products
PORT 0
P00 to P04
PORT 4
P40
PORT 12
P125
5
PCLBUZ0
Clock generator
+
Reset generator
RESET
T
OOL0
SAU0 (1 ch)
ch01
ch00
TAU0 (2 ch)
UART0
On-chip
debugger
RL78-S1
Interrupt
control
Interrupt
control
2 ch
Buzzer/clock
output control
Key return
6 ch
BCD
adjustment
Selectable
power-on-
reset
Low-speed
on-chip
oscillator
15 kHz
High-speed
on-chip
oscillator
1.25 to 20
MHz
IIC00
CSI00
SCL00
SDA00
RxD0
TxD0
SCK00
SI00
SO00
6
2
4
KR0 to KR5
INTP0, INTP1
ANI0 to ANI3
Low-speed
on-chip
oscillator
Watchdog timer
8-/10-bit
A/D converter
4 ch
PORT 13
P137
TI00 /TO00
TI01 /TO01
RAM
512 B
Code flash: 4 KB
V
DD
V
SS

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