RL78/G10 CHAPTER 17 RESET FUNCTION
R01UH0384EJ0311 Rev. 3.11 533
Dec 22, 2016
CHAPTER 17 RESET FUNCTION
The following five operations are available to generate a reset signal.
(1) External reset input via RESET pin
(2) Internal reset by watchdog timer program loop detection
(3) Internal reset by comparison of supply voltage and detection voltage of selectable power-on-reset (SPOR) circuit
(4) Internal reset by execution of illegal instruction
Note
(5) Internal reset by data retention power supply voltage
External and internal resets start program execution from the address at 0000H and 0001H when the reset signal is
generated.
Note The illegal instruction is generated when instruction code FFH is executed.
Reset by the illegal instruction execution not issued by emulation with the on-chip debug emulator.
Cautions 1. For an external reset, set the PORTSELB bit of the user option byte (000C1H) to 1 so that the
P125 pin operates as RESET, and input a low level for 10 μs or more to the RESET pin.
(To perform an external reset upon power application, input a low level to the RESET pin, and
then apply power supply. The RESET pin must be kept low for at least 10 μs during the period in
which the supply voltage is within the operating range shown in 24.4 AC Characteristics before
inputting a high level to the RESET pin.
2. During reset input, the X1 clock
Note
, high-speed on-chip oscillator clock, and low-speed on-chip
oscillator clock stop oscillating, and external main system clock
Note
input is invalid.
3. The port pin becomes the following status because each SFR and 2nd SFR are initialized after
reset.
• P40: High-impedance during external reset period or reset period by the data retention
power supply voltage. High level during other types of reset or after receiving a reset
(connected to the internal pull-up resistor).
• P125: Low level during external reset period (low level input to RESET pin). High level during
other types of reset period or after receiving a reset (connected to the internal pull-up
resistor).
• Ports other than P40 and P125: High-impedance during reset period or after receiving a reset.
Note 16-pin products only.
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