Renesas RL78/G10 User Manual

RL78/G10 CHAPTER 12 SERIAL ARRAY UNIT
R01UH0384EJ0311 Rev. 3.11 287
Dec 22, 2016
12.3.4 Serial communication operation setting register 0n (SCR0nH, SCR0nL)
The SCR0nH and SCR0nL registers are communication operation setting registers of channel n. It is used to set a data
transmission/reception mode, phase of data and clock, whether an error signal is to be masked or not, parity bit, start bit,
stop bit, and data length.
Rewriting the SCR0nH and SCR0nL registers is prohibited when the operation is enabled (when SE0n = 1).
The SCR0nH and SCR0nL registers can be set by an 8-bit memory manipulation instruction.
Reset signal generation sets the SCR0nH and SCR0nL registers to 00H and 87H, respectively.
Figure 12-6. Format of Serial Communication Operation Setting Register 0n (SCR0nH, SCR0nL) (1/2)
Address: F0119H (SCR00H) , F011BH (SCR01H) Address: F0118H (SCR00L) , F011AH (SCR01L)
After reset: 00H R/W After reset: 87H R/W
Symbol: SCR0nH Symbol: SCR0nL
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
TXE
0n
RXE
0n
DAP
0n
CKP
0n
0 EOC
0n
PTC
0n1
PTC
0n0
DIR
0n
0 SLC
0n1
Note 1
SLC
0n0
0 1 1 DLS
0n0
TXE0n RXE0n Setting of operation mode of channel n
0 0 Disable communication.
0 1 Reception only
1 0 Transmission only
1 1 Transmission/reception
DAP0n CKP0n Selection of data and clock phase in CSI mode Type
0 0
D7 D6 D5 D4 D3 D2 D1 D0
SCK00
SO00
SI 00 input timing
1
0 1
D7 D6 D5 D4 D3 D2 D1 D0
SCK00
SO00
SI 00 input timing
2
1 0
D7 D6 D5 D4 D3 D2 D1 D0
SCK00
SO00
SI 00 input timing
3
1 1
D7 D6 D5 D4 D3 D2 D1 D0
SCK00
SO00
SI 00 input timing
4
Be sure to set DAP0n, CKP0n = 0, 0 in the UART mode and simplified I
2
C mode.
EOC0n Selection of masking of error interrupt signal (INTSREx (x = 0, 1))
0 Disables generation of error interrupt INTSREx (INTSRx is generated).
1 Enables generation of error interrupt INTSREx (INTSRx is not generated if an error occurs).
Set EOC0n = 0 in the CSI mode, simplified I
2
C mode, and during UART transmission
Note 2
.
Notes 1. Provided in the SCR00L register only.
2. If EOC0n is not cleared for CSI0n, error interrupt INTSREn may be generated.
(Caution and Remark are listed on the next page.)

Renesas RL78/G10 Specifications

General

Brand	Renesas
Model	RL78/G10
Category	Motherboard
Language	English