Renesas RL78/G10 - Disabling Comparator Operation

RL78/G10 CHAPTER 11 COMPARATOR
R01UH0384EJ0311 Rev. 3.11 274
Dec 22, 2016
11.5.2 Disabling Comparator Operation
Figure 11-9. Procedure for Disabling Comparator Operation
Start
Set PER0 register.
Clear bit CMPEN in PER0 to 0 to stop clock supply to comparator.
Note that, stopping clock supply by so setting PER0 initializes all
control registers of the comparator (except for port mode register 0
(PM0), port register 0 (P0), and port mode control register 0
(PMC0)).
To use the comparator again, set control registers according to
Figure 11-8 Procedure for Enabling Comparator Operation.
Set C0ENB bit.
Disable comparator operation.
• Clear bit C0ENB in COMPMDR to 0 to disable comparator 0
operation.
Set C0IE bit.
End
(Optional)
(Mandatory)
(Mandatory)
Disable comparator interrupt request.
• Clear bit C0IE in COMPOCR to 0 to disable interrupt request.
Clear comparator interrupt request flag.
• Clear bit CMPIF0 in IF1L to 0 to initialize interrupt request
(unnecessary interrupt request cleared).