RL78/G10 CHAPTER 18 SELECTABLE POWER-ON-RESET CIRCUIT
R01UH0384EJ0311 Rev. 3.11 543
Dec 22, 2016
18.4 Cautions for Selectable Power-on-reset Circuit
In a system where the supply voltage (V
DD) fluctuates for a certain period in the vicinity of the SPOR detection voltage
(V
SPOR, VSPDR), the system may be repeatedly reset and released from the reset status. In this case, the time from release
of reset to the start of the operation of the microcontroller can be arbitrarily set by taking the following action.
<Action>
After releasing the reset signal, wait for the supply voltage fluctuation period of each system by means of a timer and
etc., and then initialize the ports.
Figure 18-3. Example of Software Processing When Supply Voltage Fluctuation is 50 ms or Less in Vicinity of
the Voltage Detection Level
; See Figure 17-5 Example of Procedure for Checking Reset Source.
Note
Reset
Initialization
processing <1>
50 ms has passed?
(TMIF0n = 1?)
Initialization
processing <2>
Setting timer array unit
(to measure 50 ms)
; Initial setting for port.
Setting of division ratio of system clock,
such as setting of timer or A/D converter.
Yes
No
Selectable power-on-reset
Clearing WDT
; f
CLK
= High-speed on-chip oscillator clock (20.4 MHz (MAX.))
Source: f
MCK
= (20.4 MHz (MAX.))/2
12
,
where comparison value = 250: ≅ 50 ms
Timer starts (TS0n = 1).
Note If reset is generated again during this period, initialization processing <2> is not started.
Remark n: Channel number
For 10-pin products, n = 0, 1; for 16-pin products, n = 0 to 3.
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