Renesas RL78/G10 - Format of On-Chip Debug Option Byte

RL78/G10 CHAPTER 19 OPTION BYTE
R01UH0384EJ0311 Rev. 3.11 547
Dec 22, 2016
19.3 Format of On-chip Debug Option Byte
The format of on-chip debug option byte is shown below.
Figure 19-4. Format of On-chip Debug Option Byte (000C3H)
Address: 000C3H
7 6 5 4 3 2 1 0
OCDENSET 0 0 0 0 1 0 1
OCDENSET Control of on-chip debug operation
0 Disables on-chip debug operation.
1 Enables on-chip debugging.
Note
Note Does not erases data of flash memory in case of failures in authenticating on-chip debug security ID.
Caution Bit 7 (OCDENSET) can only be specified a value.
Be sure to set 0000101B to bits 6 to 0.
Remark The value on bits 3 and 1 will be written over when the on-chip debug function is in use and thus it
will become unstable after the setting.
However, be sure to set the default values (0, 1, and 0) to bits 3 to 1 at setting.