Renesas RL78/G10 - 12-Bit Interval Timer Operation; 12-Bit Interval Timer Operation Timing

RL78/G10 CHAPTER 7 12-BIT INTERVAL TIMER
R01UH0384EJ0311 Rev. 3.11 228
Dec 22, 2016
7.4 12-bit Interval Timer Operation
7.4.1 12-bit interval timer operation timing
The count value specified for the ITCMP11 to ITCMP0 bits is used as an interval to operate an 12-bit interval timer that
repeatedly generates interrupt requests (INTIT).
When the RINTE bit is set to 1, the 12-bit counter starts counting.
When the 12-bit counter value matches the value specified for the ITCMP11 to ITCMP0 bits, the 12-bit counter value is
cleared to 0, counting continues, and an interrupt request signal (INTIT) is generated at the same time.
The basic operation of the 12-bit interval timer is shown in Figure 7-5.
Figure 7-5. 12-bit Interval Timer Operation Timing
(ITCMP11 to ITCMP0 = 0FFH, count clock: f
IL = 15 kHz)
INTIT
ITCMP11 to
ITCMP0
RINTE
Count clock
12-bit counter
0FFH
000H
0FFH
Counting starts at the rising edge of the first cycle of
the count clock signal after the RINTE bit is set to 1.
The 12-bit counter is cleared
asynchronously with the count clock signal
when the RINTE bit is cleared to 0.
Period (17.06 ms)