RL78/G10 CHAPTER 6 TIMER ARRAY UNIT
R01UH0384EJ0311 Rev. 3.11 156
Dec 22, 2016
6.7.3 Cautions on channel input operation
When a timer input pin is set as unused, the operating clock is not supplied to the noise filter. Therefore, after settings
are made to use the timer input pin, the following wait time is necessary before a trigger is specified to enable operation of
the channel corresponding to the timer input pin.
(1) Noise filter is disabled
When bits 12 (CCS0n), 9 (STS0n1), and 8 (STS0n0) in the timer mode register 0n (TMR0n) are all 0 and then one
of them is set to 1, wait for at least two cycles of the operating clock (f
MCK), and then set the operation enable
trigger bit in the timer channel start register (TS0).
(2) Noise filter is enabled
When bits 12 (CCS0n), 9 (STS0n1), and 8 (STS0n0) in the timer mode register 0n (TMR0n) are all 0 and then one
of them is set to 1, wait for at least four cycles of the operating clock (f
MCK), and then set the operation enable
trigger bit in the timer channel start register (TS0).
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