Renesas RL78/G10

RL78/G10 CHAPTER 12 SERIAL ARRAY UNIT
R01UH0384EJ0311 Rev. 3.11 407
Dec 22, 2016
12.7.6 Procedure for processing errors that occurred during simplified I
2
C (IIC00) communication
The procedure for processing errors that occurred during simplified I
2
C (IIC00) communication is described in Figures
12-98 and 12-99.
Figure 12-98. Processing Procedure in Case of Overrun Error
Software Manipulation Hardware Status Remark
Reads serial data register 0n
(SDR0n).
The BFF0n bit of the SSR0n register is
set to 0 and channel n is enabled to
receive data.
This is to prevent an overrun error if the
next reception is completed during
error processing.
Reads serial status register 0n (SSR0n). The error type is identified and the read
value is used to clear the error flag.
Writes 1 to serial flag clear trigger
register 0n (SIR0n).
The error flag is cleared. The error only during reading can be
cleared, by writing the value read
from the SSR0n register to the SIR0n
register without modification.
Figure 12-99. Processing Procedure in Case of ACK error in Simplified I
2
C Mode
Software Manipulation Hardware Status Remark
Reads serial status register 0n (SSR0n). The error type is identified and the read
value is used to clear the error flag.
Writes serial flag clear trigger register 0n
(SIR0n).
Error flag is cleared. The error only during reading can be
cleared, by writing the value read from
the SSRmn register to the SIRmn
register without modification.
Sets the ST0n bit of serial channel stop
register 0 (ST0) to 1.
The SE0n bit of serial channel enable
status register 0 (SE0) is set to 0 and
channel n stops operation.
The slave is not ready for reception
because ACK is not returned.
Therefore, a stop condition is created,
the bus is released, and
communication is started again from
the start condition. Or, a restart
condition is generated and
transmission can be redone from
address transmission.
Creates stop condition.
Creates start condition.
Sets the SS0n bit of serial channel start
register 0 (SS0) to 1.
The SE0n bit of serial channel enable
status register 0 (SE0) is set to 1 and
channel n is enabled to operate.
Remark n = 0 r: IIC number (r = 00)