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Renesas RL78/G10

Renesas RL78/G10
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RL78/G10 CHAPTER 12 SERIAL ARRAY UNIT
R01UH0384EJ0311 Rev. 3.11 276
Dec 22, 2016
12.1 Functions of Serial Array Unit
Each serial interface supported by the RL78/G10 has the following features.
12.1.1 3-wire serial I/O (CSI00, CSI01)
Data is transmitted or received in synchronization with the serial clock (SCK) output from the master channel.
3-wire serial communication is clocked communication performed by using three communication lines: one for the serial
clock (SCK), one for transmitting serial data (SO), one for receiving serial data (SI).
For details about the settings, see 12.5 Operation of 3-Wire Serial I/O (CSI00, CSI01) Communication.
[Data transmission/reception]
Data length of 7 or 8 bits
Phase control of transmit/receive data
MSB/LSB first selectable
[Clock control]
Master/slave selection
Phase control of I/O clock
Setting of transfer period by prescaler and internal counter of each channel
Maximum transfer rate
Note
During master communication: Max. f
CLK/4
During slave communication: Max. f
MCK/6
[Interrupt function]
Transfer end interrupt/buffer empty interrupt
[Error detection flag]
Overrun error
Note Use the clocks within a range satisfying the SCK cycle time (t
KCY) characteristics. For details, see CHAPTER
24 ELECTRICAL SPECIFICATIONS.

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