RL78/G10 CHAPTER 12 SERIAL ARRAY UNIT
R01UH0384EJ0311 Rev. 3.11 278
Dec 22, 2016
12.1.3 Simplified I
2
C (IIC00)
This is a clocked communication function to communicate with two or more devices by using two lines: serial clock
(SCL) and serial data (SDA). This simplified I
2
C is designed for single communication with a device such as EEPROM,
flash memory, or A/D converter, and therefore, it functions only as a master.
Make sure by using software, as well as operating the control registers, that the AC specifications of the start and stop
conditions are observed.
For details about the settings, see 12.7 Operation of Simplified I
2
C (IIC00) Communication.
[Data transmission/reception]
• Master transmission, master reception (only master function with a single master)
• ACK output function
Note 1
and ACK detection function
• Data length of 8 bits (When an address is transmitted, the address is specified by the higher 7 bits, and the least
significant bit is used for R/W control.)
• Manual generation of start condition and stop condition
[Interrupt function]
• Transfer end interrupt
[Error detection flag]
• Overrun error
• ACK error
* [Functions not supported by simplified I
2
C
Note 2
]
• Slave transmission, slave reception
• Multi-master function (arbitration loss detection function)
• Wait detection functions
Notes 1. When receiving the last data, 0 is written to the SOE00 bit of the serial output enable register 0 (SOE0) and
serial communication data output is stopped, disabling ACK output. See 12.7.3 (2) Processing flow for
details.
2. Full I
2
C functions are described in CHAPTER 13 SERIAL INTERFACE IICA (16-pin products only).
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