Renesas RL78/G10 User Manual

RL78/G10 CHAPTER 12 SERIAL ARRAY UNIT
R01UH0384EJ0311 Rev. 3.11 319
Dec 22, 2016
(2) Operation procedure
Figure 12-31. Initial Setting Procedure for Master Reception
Figure 12-32. Procedure for Stopping Master Reception
Starting setting to stop
Stop setting is completed
Write 1 to the ST0n bit of the target channel.
(SE0n = 0: to operation stop status)
The master transmission is stopped.
Go to the next processing.
Set the SOE0n bit to 0 and stop the output of
the target channel.
Writing the ST0 register
Changing setting of the SOE0 register
TSF0n = 0?
If there is any data being transferred, wait for
their completion.
(If there is an urgent must stop, do not wait)
Yes
No
The level of the serial clock (CKO0n) on the
target channel can be changed if necessitated
by an emergency.
Reset the serial array unit by stopping the
clock supply to it.
Changing setting of the
CKO0 register
Setting the PER0 register
(Essential)
(Selective)
(Essential)
(Selective)
(Selective)
Set an operation mode, etc.
Starting initial setting
Setting the PER0 register
Setting the SPS0 register
Setting the SMR0nH/L register
Setting the SCR0nH/L register
Setting the SDR0nH register
Setting the CKO0 register
Setting port
Writing to the SS0 register
End of initial setting
Release the serial array unit from the
reset status and start clock supply.
Set the operation clock.
Set a communication format.
Set the initial output level of the serial
clock
(
CKO0n
)
.
Enable clock output of the target channel
by setting a port register and a port mode
register.
Setting is completed.
Set dummy data to the SIOp register
(SDR0nL register) and start
communication.
Set the SS0n bit of the target channel to 1
(SE0n bit = 1: to enable operation).
Set a transfer baud rate (setting the
transfer clock by dividing the operation
clock (f
MCK)).

Renesas RL78/G10 Specifications

General

Brand	Renesas
Model	RL78/G10
Category	Motherboard
Language	English