Renesas RL78/G10 User Manual

RL78/G10 CHAPTER 14 INTERRUPT FUNCTIONS
R01UH0384EJ0311 Rev. 3.11 503
Dec 22, 2016
Cautions 1. Do not change undefined bit data.
2. When manipulating a flag of the interrupt request flag register, use a 1-bit
memory manipulation instruction (CLR1). When describing in C language, use a
bit manipulation instruction such as IF0L.0 = 0; or _asm(“clr1 IF0L.0”); because
the compiled assembler must be a 1-bit memory manipulation instruction (CLR1).
If a program is described in C language such as IF0L & = 0xfe; and compiled, it
becomes the assembler of three instructions.
mov a, IF0L
and a, #0FEH
mov IF0L, a
In this case, even if the request flag of the another bit of the same interrupt
request flag register (IF0L) is set to 1 at the timing between mov a, IF0L and mov
IF0L, a, the flag is cleared to 0 at mov IF0L, a. Therefore, care must be exercised
when using an 8-bit memory manipulation instruction in C language.

Renesas RL78/G10 Specifications

General

Brand	Renesas
Model	RL78/G10
Category	Motherboard
Language	English