Add a SIP PHE2 to Existing Simplex SIP IP Processor Group
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Purpose
This section contains the procedure for adding a SIP PHE2 to an
existing simplex SIP IP processor group.
When to use
Use this procedure to add a SIP PHE2 to an existing simplex SIP IP
processor group.
Related information
Refer to 235-118-258, Recent Change Reference, for information on
the RC/V system.
Refer to 235-080-100, Translations Guide, for information on Office
Records (output reports).
Refer to the 235-600-700/750, Input/Output Messages manuals for
additional information on the Input and Output commands.
Admonishments
Conducting an MML “switch”command in this procedure has the
potential to lose transient calls.
Before you begin
Required Tools
• Supplemental Trunk Line Workstation (STLWS) or Recent
Change and Verify (RC/V) terminal
• Access to RC/V Menu Interface
Required Material
• The 5ESS
®
switch must be running a 5E16.2 FR3 software
release with the SIP for Packet Trunking - NAR feature software.
Required Information
• STBY PHE2 Hardware (SM, PSU Shelf, and Position)
• Processor Group (SM, PSU, and PCRGRP)
Required Conditions
• Verify that the hardware growth procedures have been executed
for the desired PHE2 board, and that it is in the STBY state on
MCC page 118x, where ″x″ is the shelf on which the PHE2
board resides.
Procedure
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1
Select and prepare terminal for RC/V activities.
Provisioning
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5-118
Lucent Technologies 235-200-118
Issue 3.02B, March 2007
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