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Renesas RL78/G10

Renesas RL78/G10
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RL78/G10 CHAPTER 12 SERIAL ARRAY UNIT
R01UH0384EJ0311 Rev. 3.11 328
Dec 22, 2016
(2) Operation procedure
Figure 12-39. Initial Setting Procedure for Master Transmission/Reception
Set an operation mode, etc.
Starting initial setting
Setting the PER0 register
Setting the SPS0 register
Setting the SMR0nH/L register
Setting the SCR0nH/L register
Setting the SDR0nH/L register
Setting the SO0 and CKO0 registers
Setting the SOE0 register
Setting port
Writing to the SS0 register
End of initial setting
Release the serial array unit from the
reset status and start clock supply.
Set the operation clock.
Set a communication format.
Set the initial output level of the serial
clock (CKO0n) and serial data (SO0n).
Set the SOE0n bit to 1 and enable data
output of the target channel.
Enable data output and clock output of
the target channel by setting a port
register and a port mode register.
Setting is completed
Set transmit data to the SIOp register
(SDR0nL register) and start
communication.
Set the SS0n bit of the target channel to 1
(SE0n bit = 1: to enable operation).
Set a transfer baud rate (setting the
transfer clock by dividing the operation
clock (f
MCK)).

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