RL78/G10 CHAPTER 12 SERIAL ARRAY UNIT
R01UH0384EJ0311 Rev. 3.11 367
Dec 22, 2016
(1) Register setting
Figure 12-69. Example of Contents of Registers for UART Transmission (UART0) (1/2)
(a) Serial mode register 0n (SMR0nH, SMR0nL)
Symbol: SMR0nH Symbol: SMR0nL
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CKS0n
0/1
CCS0n
0
0
0
0
0
0
0
0
0
1
0
0
0
MD0n1
1
MD0n0
0/1
Interrupt source of channel n
0: Transfer end interrupt
1: Buffer empty interrupt
Operation clock (fMCK) of channel n
0: Prescaler output clock CK00 set by the SPS0 register
1: Prescaler output clock CK01 set by the SPS0 register
(b) Serial communication operation setting register 0n (SCR0nH, SCR0nL)
Symbol: SCR0nH Symbol: SCR0nL
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
TXE0n
1
RXE0n
0
DAP0n
0
CKP0n
0
0
EOC0n
0
PTC0n1
0/1
PTC0n0
0/1
DIR0n
0/1
0
SLC0n1
0/1
SLC0n0
0/1
0
1
1
DLS0n0
0/1
Setting of parity bit
00B: No parity
01B: Appending 0 parity
10B: Appending Even parity
11B: Appending Odd parity
Selection of data transfer sequence
0: Inputs/outputs data with MSB first
1: Inputs/outputs data with LSB first.
Setting of stop bit
01B: Appending 1 bit
10B: Appending 2 bits
(c) Serial data register 0n (SDR0nH, SDR0nL)
Symbol: SDR0nH Symbol: SDR0nL
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Baud rate setting
0
Transmit data setting
(d) Serial output level register 0 (SOL0)… Sets only the bits of the target channel.
Remarks 1. n = 0
2. Setting is fixed in the CSI master transmission mode, : Setting disabled (set to the initial value)
0/1: Set to 0 or 1 depending on the usage of the user
Symbol: 7 6 5 4 3 2 1 0
SOL0
0
0
0
0
0
0
0
SOL00
0/1
0: Non-inverted transmission
1: Inverted transmission
TXD0
To Next Page
Loading...
