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RL78/G10 CHAPTER 12 SERIAL ARRAY UNIT

R01UH0384EJ0311 Rev. 3.11 374

Dec 22, 2016

(4) Processing flow (in continuous transmission mode)

Figure 12-75. Timing Chart of UART Transmission (in Continuous Transmission Mode)

SS0n

SE0n

SDR0nL

TxDq pin

INTSTq

TSF0n

ST ST

BFF0n

<1>

<2> <2><3>

Note

<2>

<3>

<5>

<6>

<3>

<4>

MD0n0

ST0 n

Transmit data 1 Transmit data 2

Transmit data 3

Shift

Transmit data 1

Transmit data 2

Transmit data 3

Shift operationShift operation

Shift operation

Data transmission

Note If transmit data is written to the SDR0nL register while the BFF0n bit of serial status register 0n (SSR0n) is 1

(valid data is stored in serial data register 0n (SDR0nL)), the transmit data is overwritten.

Caution The MD0n0 bit of serial mode register 0n (SMR0nL) can be rewritten even during operation.

However, rewrite it before transfer of the last bit is started, so that it will be rewritten before the

transfer end interrupt of the last transmit data.

Remark q: UART number (q = 0), n = 0

Renesas RL78/G10 User Manual

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