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Renesas RL78/G10 User Manual

Renesas RL78/G10
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RL78/G10 CHAPTER 12 SERIAL ARRAY UNIT
R01UH0384EJ0311 Rev. 3.11 386
Dec 22, 2016
(3) Permissible baud rate range for reception
The permissible baud rate range for reception during UART (UART0) communication can be calculated by the
following expression. Make sure that the baud rate at the transmission side is within the permissible baud rate
range at the reception side.
(Maximum receivable baud rate) =
2 × k × Nfr
× Brate
2 × k × Nfr − k + 2
(Minimum receivable baud rate) =
2 × k × (Nfr − 1)
× Brate
2 × k × Nfr − k − 2
Brate: Calculated baud rate value at the reception side (See 12.6.3 (1) Baud rate calculation expression.)
k: SDR0nH[7:1] + 1
Nfr: 1 data frame length [bits]
= (Start bit) + (Data length) + (Parity bit) + (Stop bit)
Remark n = 1
Figure 12-83. Permissible Baud Rate Range for Reception (1 Data Frame Length = 11 Bits)
FL
1 data frame (11 × FL)
(11 × FL) min.
(11 × FL) max.
Data frame length
of SAU
Start
bit
Bit 0 Bit 1 Bit 7
Parity
bit
Permissible minimum
data frame length
Permissible maximum
data frame length
Stop
bit
Start
bit
Bit 0 Bit 1 Bit 7
Parity
bit
Latch
timing
Stop
bit
Start
bit
Bit 0 Bit 1 Bit 7
Parity
bit
Stop
bit
As shown in Figure 12-83 the timing of latching receive data is determined by the division ratio set by bits 15 to 9 of
serial data register 0nH (SDR0nH) after the start bit is detected. If the last data (stop bit) is received before this
latch timing, the data can be correctly received.

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Renesas RL78/G10 Specifications

General IconGeneral
BrandRenesas
ModelRL78/G10
CategoryMotherboard
LanguageEnglish

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