EasyManua.ls Logo

Renesas RL78/G10 - Page 496

Renesas RL78/G10
637 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
RL78/G10 CHAPTER 13 SERIAL INTERFACE IICA
R01UH0384EJ0311 Rev. 3.11 479
Dec 22, 2016
(h) When arbitration loss occurs due to low-level data when attempting to generate a stop condition
(i) When WTIM0 = 0
ST AD6 to AD0 R/W ACK D7 to D0 D7 to D0ACK SPACK D7 to D0 ACK
SPT0 = 1
3 4 5 2 1
1: IICS0 = 1000×110B
2: IICS0 = 1000×000B (Sets the WTIM0 bit to 1)
3: IICS0 = 1000×100B (Clears the WTIM0 bit to 0)
4: IICS0 = 01000100B
5: IICS0 = 00000001B
Remark
: Always generated
: Generated only when SPIE0 = 1
×: Don’t care
(ii) When WTIM0 = 1
ST AD6 to AD0 R/W ACK D7 to D0 D7 to D0ACK SPACK D7 to D0 ACK
SPT0 = 1
3 4 2 1
1: IICS0 = 1000×110B
2: IICS0 = 1000×100B (Sets the SPT0 bit to 1)
3: IICS0 = 01000100B
4: IICS0 = 00000001B
Remark
: Always generated
: Generated only when SPIE0 = 1
×: Don’t care

Table of Contents

Related product manuals