High-Speed Input and
Pulse Output Features
3–44
High-speed Input and Pulse Output Features
Mode 40: High-Speed Interrupts
The HSIO Mode 40 provides a high-speed interrupt to the ladder program. This
capability is provided for your choice of the following application scenarios:
S An external event needs to trigger an interrupt subroutine in the CPU.
Using immediate I/O instructions in the subroutine is typical.
S An interrupt routine needs to occur on a timed basis which is different
from the CPU scan time (either faster or slower). The timed interrupt is
programmable, from 5 to 999 mS.
The HSIO circuit creates the high-speed interrupt to the CPU. The following diagram
shows the external interrupt option, which uses X0. In this configuration X1 and X2
are normal filtered inputs.
Output Circuit
Input Circuit
CPU
PLC
DL05
X0
Y0, Y1
X3- X7
Y2 - Y5
VĆmemory
V7633
0040
Mode Select
I/O data
HSIO
Interrupt
X1, X2
Interrupt
FILTER
Alternately, you may configure the HSIO circuit to generate interrupts based on a
timer, as shown below. In this configuration, inputs X0 through X2 are filtered inputs.
Output Circuit
Input Circuit
CPU
PLC
DL05
Y0, Y1
X3- X7
Y2 - Y5
VĆmemory
V7633
0040
Mode Select
I/O data
HSIO
Timer
X0, X1, X2
Interrupt
Interrupt
FILTER
Purpose
Functional Block
Diagram