CPU Specifications
and Operation
4–28
CPU Specifications and Operation
Memory Type Discrete Memory
Reference
(octal)
Word Memory
Reference
(octal)
Qty.
Decimal
Symbol
Input Points
(See note 1)
X0 – X377 V40400 - V40417 256
Output Points
(See note 1)
Y0 – Y377 V40500 – V40517 256
Control Relays C0 – C777 V40600 - V40637 512
Special Relays SP0 – SP777 V41200 – V41237 512
Timers T0 – T177 V41100 – V41107 128
Timer Current
Values
None V0 – V177 128
Timer Status Bits T0 – T177 V41100 – V41107 128
Counters CT0 – CT177 V41140 – V41147 128
Counter
Current Values
None V1000 – V1177 128
Counter Status
Bits
CT0 – CT177 V41140 – V41147 128
Data Words None V1200 – V7377 3968 None specific, used with many
instructions
Data Words
Non–volatile
None V7400 – V7577 128 None specific, used with many
instructions
Stages S0 – S377 V41000 – V41017 256
System
parameters
None V7600 – V7777 128 None specific, used for various
purposes
1 – The DL05 systems are limited to 8 discrete inputs and 6 discrete outputs with the present available hardware, but 256 point addresses exist.
DL05 Memory Map
X0
Y0
C0C0
SP0
TMR T0
K100
V0 K100
T0
CNT CT0
K10
V1000 K100
CT0
SG
S 001
S0