Keysight U8903B - Configuration 3

A Appendixes
568 Keysight U8903B User’s Guide
Configuration 3
In this configuration, an external master clock is used to synchronize the DUT and U8903B.
A phase-locked loop (PLL) is used in the U8903B to lock the incoming master clock and
regenerate the frame sync and bit clock. Data will be clocked in on each bit clock.
Press on the FUNCTION panel to switch between audio generator or audio analyzer
mode, and press on the FUNCTION panel to switch to digital interface.
Figure A-6 DSI test configuration 3
1 At the digital analyzer, press Input Config > Connector, and select DSI as the digital
analyzer input type.
2 At the digital generator, press DSI Config > Master Clock, and select Off to turn off the
master clock.
3 At the digital analyzer, press DSI Config > W/Bclk Dir, and select Out as the word and bit
clock direction.
4 At the digital generator, press DSI Config > Multiplier, and set the multiplier to determine
the sampling rate.
U8903B
DUT
External master clock
Sync In
Pin 9
Pin 10
Pin 11
Bit clock
Frame Sync
Data