RL78/G10 CHAPTER 6 TIMER ARRAY UNIT
R01UH0384EJ0311 Rev. 3.11 112
Dec 22, 2016
(c) Channel 3
Note
TO03
PMxx
OVF
0n
INTTM0n
(T
imer interrupt)
CK00
CK01
fMCK
fTCLK
INTTM0nH
(T
imer interrupt)
Interrupt
controller
Output
controller
Output latch
(Pxx)
Timer status
register 03 (TSR03)
Overflow
Timer data register 03 (TDR03)
Timer counter register 03 (TCR03)
Timer mode register 0n (TMR0nH, TMR0nL)
TMR0nH
TMR0nL
Timer controller
Trigger
selection
Count clock
selection
Mode
selection
Edge
detection
Operating
clock selection
Interrupt signal from master channel
8-bit timer
controller
Mode
selection
Interrupt
controller
TI03
CKS0n1
CCS0n
SPLIT
0n
STS0n
2STS0n1 STS0n0 MD0n2CIS0n1 CIS0n0 MD0n3 MD0n1 MD0n0
Note 16-pin products only.
Remark n = 3