RL78/G10 CHAPTER 12 SERIAL ARRAY UNIT
R01UH0384EJ0311 Rev. 3.11 379
Dec 22, 2016
(2) Operation procedure
Figure 12-78. Initial Setting Procedure for UART Reception
Caution After setting the RXE0n bit of SCR0n register to 1, be sure to set SS0n to 1 after 4 or more f
MCK
clocks have elapsed.
Figure 12-79. Procedure for Stopping UART Reception
Starting setting to stop
Stop setting is completed
Write 1 to the ST0n bit of the target channel.
(SE0n = 0: to operation stop status)
The master transmission is stopped.
Go to the next processing.
Writing to the ST0 register
TSF0n = 0?
If there is any data being transferred, wait for
their completion.
(If there is an urgent must stop, do not wait)
Yes
No
Reset the serial array unit by stopping the
clock supply to it.
Setting the PER0 register
(Essential)
(Selective)
(Selective)
Starting initial setting
Setting the PER0 register
Setting the SPS0 register
Setting the SMR0n and SMR0r registers
Setting the SCR0n register
Setting the SDR0nH register
Writing to the SS0 register
Completing initial setting
Release the serial array unit from the
reset status and start clock supply.
Set the operation clock.
Set an operation mode, etc.
Set a communication format.
Set a transfer baud rate (setting the
transfer clock by dividing the operation
clock (f
MCK)).
Set the SS0n bit of the target channel to 1 and
set the SE0n bit to 1 (to enable operation).
Become wait for start bit detection.
Setting port
Enable data input of the target channel
by setting a port register and a port
mode register.
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