Renesas RL78/G10 - Page 9

Index-4
6.3.6 Timer channel start register 0 (TS0, TSH0 (8-bit mode)) ............................................................... 127
6.3.7 Timer channel stop register 0 (TT0, TTH0 (8-bit mode)) ................................................................ 128
6.3.8 Timer output enable register 0 (TOE0) ........................................................................................... 129
6.3.9 Timer output register 0 (TO0) ......................................................................................................... 130
6.3.10 Timer output level register 0 (TOL0) ............................................................................................. 131
6.3.11 Timer output mode register 0 (TOM0) .......................................................................................... 132
6.3.12 Noise filter enable register 1 (NFEN1) .......................................................................................... 133
6.3.13 Input switch control register (ISC) ................................................................................................ 134
6.3.14 Registers controlling port functions of pins to be used for timer I/O ............................................. 135
6.4 Basic Rules of Timer Array Unit ............................................................................................... 136
6.4.1 Basic rules of simultaneous channel operation function ................................................................. 136
6.4.2 Basic rules of 8-bit timer operation function (only channels 1 and 3) ............................................. 138
6.5 Operation of Counter ................................................................................................................. 139
6.5.1 Count clock (fTCLK) .......................................................................................................................... 139
6.5.2 Start timing of counter .................................................................................................................... 141
6.5.3 Counter operation ........................................................................................................................... 142
6.6 Channel Output (TO0n pin) Control .......................................................................................... 147
6.6.1 TO0n pin output circuit configuration .............................................................................................. 147
6.6.2 TO0n pin output setting .................................................................................................................. 148
6.6.3 Cautions on channel output operation ............................................................................................ 149
6.6.4 Collective manipulation of TO0n bit ................................................................................................ 153
6.6.5 Timer interrupt and TO0n pin output at count operation start ......................................................... 154
6.7 Timer Input (TI0n) Control ......................................................................................................... 155
6.7.1 TI0n input circuit configuration ........................................................................................................ 155
6.7.2 Noise filter ...................................................................................................................................... 155
6.7.3 Cautions on channel input operation .............................................................................................. 156
6.8 Independent Channel Operation Function of Timer Array Unit ............................................. 157
6.8.1 Operation as interval timer/square wave output ............................................................................. 157
6.8.2 Operation as external event counter .............................................................................................. 163
6.8.3 Operation as frequency divider (only channels 0 and 3) ................................................................ 168
6.8.4 Operation as input pulse interval measurement ............................................................................. 173
6.8.5 Operation as input signal high-/low-level width measurement ........................................................ 178
6.8.6 Operation as delay counter ............................................................................................................ 183
6.9 Simultaneous Channel Operation Function of Timer Array Unit .......................................... 188
6.9.1 Operation as one-shot pulse output ............................................................................................... 188
6.9.2 Two-channel input with one-shot pulse output function .................................................................. 197
6.9.3 Operation as PWM output function ................................................................................................. 206
6.9.4 Operation as multiple PWM output function ................................................................................... 214
6.10 Cautions When Using Timer Array Unit ................................................................................. 223
6.10.1 Cautions when using timer output ................................................................................................ 223