Sel 2414 - Page 338

H.6
SEL-2414 Transformer Monitor Instruction Manual Date Code 20130214
Device Word Bits
Definitions
46 * Reserved
DSABLSET SEL
OGIC Equation: Do not allow settings changes from the front panel when asserted.
RSTTRGT SEL
OGIC Equation: Reset targets when asserted. (Remote target reset via rising-edge of this RW)
ER SEL
OGIC Equation ER.
TRGTR Target Reset. Asserts for one-quarter cycle if front-panel or serial port target reset is executed.
SPEN SEL
OGIC Equation SPEN. (Enables Signal Profiling when set).
* Reserved
47 RELAY_EN 61850 Data Quality Bit
* Reserved
MATHERR SEL
OGIC control equation math error: asserts when there is an overflow, NAN or divide by zero condi-
tion.
ERTDIN State of contact input on external RTD unit (2600A).
ERTDFLT Asserts on if any failure on any external RTD including open-circuit or shorted RTDs or communication
loss of the SEL-2600.
IRTDFLT Asserts on if any failure on any internal RTD card or internal general purpose RTD/TC card including
open-circuit or shorted RTDs.
48 IN101–IN102 Digital input slot 1 input 101–102
* Reserved
49 IN301–IN308 Digital inputs slot 3
50 IN401–IN408 Digital inputs slot 4
51 IN501–IN508 Digital inputs slot 5
52 IN601–IN608 Digital inputs slot 6
53 OUT101–
OUT103
Digital output slot 1 output 101–103
* Reserved
54 OUT301–
OUT308
Digital outputs slot 3
55 OUT401–
OUT408
Digital outputs slot 4
56 OUT501–
OUT508
Digital outputs slot 5
57 OUT601–
OUT608
Digital outputs slot 6
58 AILW1 Analog inputs Low Warning, Level 1. If any AIxxxLW1 = 1, then AILW1 = 1.
AILW2 Analog inputs Low Warning, Level 2. If any AIxxxLW2 = 1, then AILW2 = 1.
AILAL Analog inputs Low Alarm Limit. If any AIxxxLAL = 1, then AILAL = 1.
* Reserved
AIHW1 Analog inputs High Warning, Level 1. If any AIxxxHW1 = 1, then AIHW1 = 1.
AIHW2 Analog inputs High Warning, Level 2. If any AIxxxHW2 = 1, then AIHW2 = 1.
AIHAL Analog inputs High Alarm Limit. If any AIxxxHAL = 1, then AIHAL = 1.
* Reserved
59–90
AIxxxLW1
Analog inputs 301-608 Warnings/Alarms (where xxx = 301–608)
Low Warning, Level 1
AIxxxLW2 Low Warning, Level 2
AIxxxLAL Low Alarm Limit
* Reserved
AIxxxHW1 High Warning, Level 1
AIxxxHW2 High Warning, Level 2
AIxxxHAL High Alarm Limit
* Reserved
Table H.2 Device Word Bit Definitions (Sheet 3 of 7)
Row Bit Definition