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ST STM32F410 User Manual

ST STM32F410
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Direct memory access controller (DMA) RM0401
164/771 RM0401 Rev 3
8.3 DMA functional description
8.3.1 DMA block diagram
Figure 22 shows the block diagram of a DMA.
Figure 22. DMA block diagram
8.3.2 DMA overview
The DMA controller performs direct memory transfer: as an AHB master, it can take the
control of the AHB bus matrix to initiate AHB transactions.
It carries out the following transactions:
peripheral-to-memory
memory-to-peripheral
memory-to-memory
The DMA controller provides two AHB master ports: the AHB memory port, intended to be
connected to memories and the AHB peripheral port, intended to be connected to
peripherals. However, to allow memory-to-memory transfers, the AHB peripheral port must
also have access to the memories.
The AHB slave port is used to program the DMA controller (it supports only 32-bit
accesses).
See Figure 23 for the implementation of the system of two DMA controllers.
!("MASTER
-EMORYPORT
&)&/
!("MASTER
0ERIPHERALPORT
342%!-
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342%!-
342%!-
342%!-
&)&/
342%!-342%!-
&)&/
342%!-
342%!-
2%1?342%!-
2%1?342?#(
2%1?342?#(
$-!CONTROLLER
&)&/
342%!-342%!-
&)&/
342%!-342%!-
&)&/
342%!-342%!-
&)&/
342%!-342%!-
!RBITER
2%1?342%!-
2%1?342%!-
2%1?342%!-
2%1?342%!-
2%1?342%!-
2%1?342%!-
2%1?342%!-
2%1?342?#(
2%1?342?#(
2%1?342?#(
2%1?342?#(
2%1?342?#(
2%1?342?#(
2%1?342?#(
!("SLAVE
PROGRAMMING
INTERFACE
0ROGRAMMINGPORT
#HANNEL
SELECTION
AIB

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ST STM32F410 Specifications

General IconGeneral
BrandST
ModelSTM32F410
CategoryMicrocontrollers
LanguageEnglish

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