Debug support (DBG) RM0401
732/771 RM0401 Rev 3
26 Debug support (DBG)
26.1 Overview
The STM32F410 is built around a Cortex
®
-M4 with FPU core which contains hardware
extensions for advanced debugging features. The debug extensions allow the core to be
stopped either on a given instruction fetch (breakpoint) or data access (watchpoint). When
stopped, the core’s internal state and the system’s external state may be examined. Once
examination is complete, the core and the system may be restored and program execution
resumed.
The debug features are used by the debugger host when connecting to and debugging the
STM32F410 MCUs.
Two interfaces for debug are available:
• Serial wire
• JTAG debug port
Figure 273. Block diagram of STM32 MCU and Cortex
®
-M4 with FPU-level
debug support
Note: The debug features embedded in the Cortex
®
-M4 with FPU core are a subset of the Arm
®
CoreSight Design Kit.
E
S
T
R
I
C
T
E
D
$
I
#ORTEX-
CORE
37*$0
!("!0
"RIDGE
.6)#
$74
&0"
)4-
40)5
$#ODE
INTERFACE
3YSTEM
INTERFACE
)NTERNALPRIVATE
PERIPHERALBUS00"
%XTERNALPRIVATE
PERIPHERALBUS00"
"USMATRIX
$ATA
4RACE PO R T
$"'-#5
34-&XXDEBUGSUPPORT
#ORTEX-DEBUGSUPPORT
*4-3
*4$)
*4$/
.*4234
*4#+
37$)/
37#,+
42!#%37/
42!#%37/
42!#%#+
42!#%$;=
-36
To Next Page
Loading...
Need help?
General
