RM0401 Rev 3 65/771
RM0401 Embedded Flash memory interface
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3.8.6 Flash option control register (FLASH_OPTCR)
The FLASH_OPTCR register is used to modify the user option bytes.
Address offset: 0x14
Reset value: 0x0FFF FFED. The option bits are loaded with values from Flash memory at
reset release.
Access: no wait state when no Flash memory operation is ongoing, word, half-word and
byte access.
Bits 9:8 PSIZE: Program size
These bits select the program parallelism.
00 program x8
01 program x16
10 program x32
11 program x64
Bit 7 Reserved, must be kept cleared.
Bits 6:3 SNB: Sector number
These bits select the sector to erase.
0000 sector 0
0001 sector 1
0010 sector 2
0011 sector 3
0100 sector 4
0101: not allowed
...
1011 not allowed
1100 user specific sector
1101 user configuration sector
1110 not allowed
1111 not allowed
Bit 2 MER: Mass Erase
Erase activated for all user sectors.
Bit 1 SER: Sector Erase
Sector Erase activated.
Bit 0 PG: Programming
Flash programming activated.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
SPR
MOD
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. nWRP[4:0]
rw
rw rw rw rw rw
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RDP[7:0]
nRST_
STDBY
nRST_
STOP
WDG_S
W
Res. BOR_LEV
OPTST
RT
OPTLO
CK
rw rw rw rw rw rw rw rw rw rw rw rw rw rs rs
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